1. Field of the Invention
The present invention relates to semiconductor devices. More particularly, the present invention relates to a pad used for the chemical/mechanical polishing (CMP) of a semiconductor substrate.
2. Description of the Related Art
As semiconductor devices become more integrated, planarization processes are gaining more attention. A chemical/mechanical polishing (CMP) device is one type of apparatus used to carry out a planarization process. The CMP device is used for performing a global planarization of semiconductor devices. In this process, a surface of a semiconductor substrate is polished both mechanically and chemically. The mechanical polishing occurs due to contact between the semiconductor substrate and a polishing pad, whereas the chemical polishing is carried out by exposing the substrate to a slurry.
The CMP planarization process has drawbacks such as the high costs in running the process and the difficulty in achieving uniformity in the thickness of the polished surface of the semiconductor substrate. Irregularities in the thickness of the substrate occur due to a non-uniform distribution of the load applied to the semiconductor substrate while it is polished. Thus, CMP devices require a controller capable of precisely controlling load distribution.
Furthermore, the uniformity of polishing using CMP also depends on the speed of rotation of a carrier on which the semiconductor substrate is fixed, and the speed of rotation of a polishing table to which the polishing pad is fixed. With these factors present, the precision by which load distribution can be controlled is rather limited when polishing semiconductor substrates which have a diameter of about 150 mm and a thickness of between 1 .mu.m and several hundreds of angstroms. In fact, non-uniformity in the thickness of such polished substrates is typically approximately 10%.
The polishing pad in CMP devices typically has a polishing surface in which a plurality of holes or grooves are uniformly formed. The holes or the grooves contain slurry supplied to the polishing pad and in turn supply the slurry to the interface between the semiconductor substrate and the polishing pad. Also, the effective polishing surface of the polishing pad, i.e., the portion of the pad actually contacting the semiconductor substrate, is determined by the holes or the grooves. Thus, the size or the form of the holes or the grooves has a great effect on the polishing property of the pad.
The holes or the grooves of the polishing pad are formed on central and peripheral regions of the pad, as well as along a track where the polishing pad runs in contact with the semiconductor substrate. Thus, it is difficult to compensate for irregular polishing in which the center of the semiconductor substrate and the periphery of the substrate are polished to different extents. Even if the semiconductor substrate is moved off of the track, irregular polishing cannot be compensated for because the grooves or holes are configured uniformly over the surface of the polishing pad.